AT9541
Part Number Description Max frequency (kHz) Vcc Range(V) Interrupt Reset 5V-to lerant I/O Push-pull Open-drain Status Cross Reference I2C Adress Chnnel width Simulta neously active channels Cross Reference Pin/Package
AT9541 400 2.3~5.5 2020Q1 PCA9541 111xxxx 2 2 to 1 PCA9541 SOP16L TSSOP16 QFN16

描述

    The AT9546A is a quad bidirectional translating switch controlled via the I2C-bus. The SCL/SDA upstream pair fans out to four downstream pairs, or channels. Any individual SCx/SDx channel or combination of channels can be selected, determined by the contents of the programmable control register.

    An active LOW reset input allows the AT9546A to recover from a situation where one of the downstream I2C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets the I2C-bus state machine and causes all the channels to be deselected as does the internal Power-On Reset (POR) function.

    The pass gates of the switches are constructed such that the VDD pin can be used to limit the maximum high voltage which is passed by the AT9546A. This allows the use of different bus voltages on each pair, so that 1.8 V or 2.5 V or 3.3 V parts can communicate with 5 V parts without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 5 V tolerant.

Features

    1-of-4 bidirectional translating switches

    I2C-bus interface logic; compatible with SMBus standards

    Active LOW reset input

    3 address pins allowing up to 8 devices on the I2C-bus

    Channel selection via I2C-bus, in any combination

    Power-up with all switch channels deselected

    Low  Ron  switches

    Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and 5 V buses

    No glitch on power-up

    Supports hot insertion

    Low standby current

    Operating power supply voltage range of 2.3 V to 5.5 V

    5 V tolerant Inputs

    0 Hz to 400 kHz clock frequency

    ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101

    Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA

    Three packages offered: SO16, TSSOP16, and HVQFN16


技术支持:万广互联 芯景AnalogTek-CLOCK|RTC|RS232|RS485|LVDS|I2C|多协议收发芯片|马达驱动芯片-武汉芯景科技有限公司WuHan AnalogTek Technology Co., Ltd. 鄂ICP备20005446号-1