AT24C64
DESCRITION The AT24C32A/64A provides 32,768/65,536 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 4096/8192 words of 8 bits each. The device’s cascadable feature allows up to 8 devices to share a common two-wire bus. The device is optimized for use in many automotive applications where low power and low voltage operation are essential. The AT24C32A/64A is available in space saving 8-lead JEDEC SOIC and 8-lead TSSOP packages and is accessed via a 2-wire serial interface and is available in a 2.7V (2.7V to 5.5V) version. Features Standard-Voltage Operation – 2.7 (VCC = 2.7V to 5.5V) Internally Organized 4096 x 8 (32K), 8192 x 8 (64K) Two-wire Serial Interface Schmitt Trigger, Filtered Inputs for Noise Suppression Bidirectional Data Transfer Protocol 400 kHz Clock Rate Write Protect Pin for Hardware Data Protection 32-byte Page Write Mode (Partial Page Writes Allowed) Self-timed Write Cycle (5 ms Max) High Reliability – Endurance: 1 Million Write Cycles – Data Retention: 100 Years Lead-free/Halogen-free Devices Available 8-lead JEDEC SOIC and 8-lead TSSOP Packages Block Diagram |