AT24C128
Part Number Description Voltage (V) Operating Frequency (Khz) WRITE SPEED (ms) Operating temperature Status Capacity Architecture Pin/Package
AT24C128 1.7~5.5 1000 5 -40~85 Mass production 128k 16K**8 DIP8/SOP8/TSSOP8/UDFN/SOT23-5/CSP

DESCRITION

    The AT24C128/256 provides 131,072/262,144 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 16,384/32,768 words of 8 bits each. The device’s cascadable feature allows up to 4 devices to share a common Two-wire bus. The device is optimized for use in many industrial and commercial appli-cations where low power and low voltage operation are essential. The devices are available in space-saving 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead MAP (24C128), 8-lead TSSOP, 8-lead SOIC Array Package and 8-ball dBGA2 packages. In addition, the entire family is available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 3.6V) versions.

Features

    Low-voltage and Standard-voltage Operation

    – 2.7 (VCC = 2.7V to 5.5V)

    – 1.8 (VCC = 1.8V to 3.6V)

    Internally Organized 16,384 x 8 and 32,768 x 8

    Two-wire Serial Interface

    Schmitt Trigger, Filtered Inputs for Noise Suppression

    Bidirectional Data Transfer Protocol

    1 MHz (5V), 400 kHz (2.7V, 2.5V) and 100 kHz (1.8V) Compatibility

    Write Protect Pin for Hardware and Software Data Protection

    64-byte Page Write Mode (Partial Page Writes Allowed)

    Self-timed Write Cycle (5 ms Max)

    High Reliability

    – Endurance: One Million Write Cycles

    – Data Retention: 40 Years

    Extended Temperature and Lead-free/Halogen-free Devices Available

    8-lead JEDEC PDIP, 8-lead JEDEC and EIAJ SOIC, 8-lead MAP, 8-lead TSSOP, 8-lead SAP and 8-ball dBGA2 Packages

    Die Sales: Wafer Form, Waffle Pack, and Bumped Wafers

Block Diagram

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