AT24C1024
Part Number Description Status Capacity Architecture Voltage (V) Operating Frequency (Khz) WRITE SPEED (ms) Operating temperature Pin/Package
AT24C1024 Mass production 1024K 128K*8 1.7~5.5 1000 5 -40~85 SOP8/TSSOP8/UDFN8

DESCRITION

    The AT24C1024 provides 1,048,576 bits of serial electrically erasable and program-mable read only memory (EEPROM) organized as 131,072 words of 8 bits each. The device’s cascadable feature allows up to two devices to share a common two-wire bus. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The devices are available in space-saving 8-lead PDIP, 8-lead EIAJ SOIC, 8 -lead Leadless Array (LAP) and 8-lead SAP packages. In addition, the entire family is available in 2.7V (2.7V to 5.5V) versions.

Features

    Low-voltage Operation

    – 2.7 (VCC = 2.7V to 5.5V)

    Internally Organized 131,072 x 8

    Two-wire Serial Interface

    Schmitt Triggers, Filtered Inputs for Noise Suppression

    Bidirectional Data Transfer Protocol

    400 kHz (2.7V) and 1 MHz (5V) Clock Rate

    Write Protect Pin for Hardware and Software Data Protection

    256-byte Page Write Mode (Partial Page Writes Allowed)

    Random and Sequential Read Modes

    Self-timed Write Cycle (5 ms Typical)

    High Reliability

    – Endurance: 100,000 Write Cycles/Page

    – Data Retention: 40 Years

    8-lead PDIP, 8-lead EIAJ SOIC, 8-lead LAP and 8-lead SAP Packages

    Die Sales: Wafer Form, Waffle Pack and Bumped Die

Block Diagram

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